Electronic desk top calculators have been changed in design due to the availability of MOS/LSI chips which allow the entire system to be embodied in only one or a small number of semiconductor devices. The term MOS/LSI refers to Metal Oxide Semiconductor Large Scale Integrated Circuits; "MOS" is used interchangably with MIS or Metal Insulator Semiconductor, both terms referring generally to insulated gate field effect transistors. This technology permits large savings in manufacturing, labor and material costs and allows calculators to have operating functions not possible at reasonable cost in machines built from discrete devices or from large numbers of integrated circuits. A calculator system adapted to be implemented using only one MOS/LSI chip is set forth in co-pending application Ser. No. 163,565, assigned to the assignee of this invention, now abandoned. A feature of the calculator disclosed in application Ser. No. 163,565 is the use of a random access memory array which is sequentially addressed to operate as a plurality of shift registers; this unit provides the main data registers in a space on the chip much less than needed for shift registers of conventional design. Another feature of said application was the keyboard scanning technique.
It is a principal feature of this present invention to provide an improved electronic calculator system adapted to be implemented in MOS/LSI technology, in a minimum of semiconductor chips or wafers. Another feature is to provide an expandable system which may include optional program memory arrays and data registers. Other features include use of the sequentially addressed memory of Ser. No. 163,565 with a timing arrangement in such a manner that auxilliary timing generators are not needed, and the provision of a keyboard interface register which provides keyboard and timing information encoded for entering into the data registers or for selecting an address for the program memory. A further feature is an arithmetic logic unit which operates fast enough so that bits in the data registers may be shifted in parallel out of cells in the sequentially addressed memory array through the ALU and back into the same cells.